Design Technique of Low Voltage Cmos OP-AMP

Pages:175-176
Vinod Kumar (Research Scholar, School of Electronics & Electrical Engineering, Singhania University, Rajasthan)

In this paper low power CMOS Op-Amp operating with low supply voltage is described. It will begin by presenting one of the traditional low voltage CMOS Op-Amp design techniques such as folded cascode structure and then describe some more recent developments in Op-Amp design such as floating gate and bulk driven CMOS Op-Amps.